Computer Architecture


1.) Expanded Structure of IAS computer

Fig: Expanded structure of IAS computer Memory buffer register


Contains a word to be stored in memory or sent to the I/O unit, or is used to receive a word from memory or from the I/O unit.

Memory address register (MAR) :-

Specifies the address of memory in the word to be written from or read into the MBR.

Instruction register (IR) :-

Contains the 8 bits Opcode instruction being executed.

Instruction buffer register (IBR):-

Employed to hold temporarily the right- hand instruction from a word in memory.

Program counter (PC):-

Contains the address of the next instruction-pair to be fetched from memory.

Accumulator (AC) and multiplier quotient (MQ):-

Employed to hold temporarily operands and results of ALU operations. For example, the result of multiplying two 40-bit numbers is an 80-bit number; the most significant 40 bits are stored in the AC and the least significant in the MQ.

Central processing unit (CPU):-

Controls the operation of the computer and performs its data processing functions; often simply referred to as processor.


Moves data between the computer and its external environment.

2.) Flow chart of IAS Computer:-

The IAs operates by respectively performing as instruction cycle. Each instruction cycle consists of two sub-cycles.

Fetch Cycle:-

The opcode of next instruction is loaded into the IR and the address portion is loaded into the MAR. This instruction may be taken from the IBR, or it can be obtained from memory by loading a word into the MBR, and then down to the IBR, IR and MAR.

Execute Cycle

The control circuitry interprets the Opcode & executes the instruction by sending out the appropriate control signals to cause data to be moved or an operation to be performed by the ALU.

3.)IAS instruction format:-
The memory of IAS consists of 1000 storage locations called words of 40 binary digits each. Both data & instructin are stored there, Number are represented in binary form.

Fig. IAS Format

Each number is represented by a sign bit and a 39 bit value. A word may also contain 20 bit instruction consisting of an 8 bit operation code(opcode) specifying the operation to be performed and 12 bit address designing one of the words in memory (numbered from 0 to 999)

IAS computer had a total of 21 instruction that can be grouped as follows.

Data transfer:-

Move data between memory and ALU register or between two ALU registers.

Unconditional branch:-

The control unit executes instruction in sequence from memory. There sequence can be changed by a branch instruction which facilitates repetitive operations.

Conditional branch:-

Branch can be made dependent on a condition thus allowing decision part.


It comprises operation performed by ALU

Address modify:-

It permits address to be computed in ALU and then inserted into instruction stored in memory.

4.) The difference between computer Organization and Computer Architecture:-

Computer organization

- Deals with all physical components of computer systems that interacts with each other to perform various functionalities.
- The lower level of computer organization is known as micro- architecture which is more detailed and concrete.
- Examples of Organizational attributes includes Hardware details transparent to the programmer such as control signal and peripheral.

Computer architecture

- Refers as a set of attributes of a system as seen by programmer
- Examples of the Architectural attributes include the instruction set, the no of bits used to represent the data types, Input Output mechanism and technique for addressing memories.

The difference between architecture and organization is best described by a non-computer example. Is the gear level in a motorcycle part of it is architecture or organization? The architecture of a motorcycle is simple; it transports you from A to B. The gear level belongs to the motorcycle's organization because it implements the function of a motorcycle but is not part of that function

5.)Scale Of Integration:-
The number of components fitted into a standard size IC represents its integration scale, in other words it’s a density of components. It is classified as follows:
€ SSI – Small Scale Integration
It have less than 100 components (about 10 gates).

€MSI – Medium Scale Integration
It contains less than 500 components or have more than 10 but less than 100 gates.

€ LSI – Large Scale Integration
Here number of components is between 500 and 300000 or have more than 100 gates.

€ VLSI – Very Large Scale Integration
It contains more than 300000 components per chip

€VVLSI - Very Very Large Scale Integration
It contains more than 1500000 components per chip.

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